Summer ITP – VLSI & Digital System Design

ITP in VLSI

VLSI & Digital System Design Training in Internship & Training Program -Summer 2015 by Micro Incept Technologies with 100% hands on training with live project experience in Delhi & Chennai. Learn Semiconductor technology, Nmos, Pmos & Cmos logic, Designing Analog and Digital ICs, VLSI design procedure- Specification, Architecture, Layout Coding, Layout Verification, Synthesis & Simulation, HDL modelling, VHDL programming, Verilog Programming, ASIC design, Testing & Verification of designs, Design on XILIN FPGA, System on Chip modelling, Hybrid applications with LABVIEW.

VLSI & Digital System Design ITP Content

Level/
Code
level of Coverage Projects
Covered
L1
TIERL1
(1 week)
Fees:# Without takeaway kit: 2,450 Rs.**Fees is inclusive
of all taxes and
every participant
will get a DVD
which will contain
Softwares and
Tutorials.

 

  • Basic circuit components
  • Basic circuit design on MULTISIM Tool
  • Introduction to Digital Electronics.
  • Digital logic design & Digital logic gates.
  • Digital circuit minimization techniques.
  • Evolution of VLSI.
  • Semiconductor technology.
  • N-mos, P-mos & C-mos logic.
  • CMOS fundamentals and characterization.
  • About Digital IC Design.
  • About Analog IC design.
  • Introduction to VLSI design process:
    1. Specification
    2. Architecture
    3. Layout Coding
    4. Layout Verification
    5. Synthesis & Simulation

 

# No. of mini projects – 3# No. of major projects – 0
L2
TIERL2
(2 weeks)
Fees:# Without takeaway kit: 4,950 Rs.**Fees is inclusive
of all taxes and
every participant
will get a DVD
which will contain
Softwares and
Tutorials.

Content of L1 +

  • Introduction to HDL modelling.
  • Basics of C – programming language.
  • Programming in Verilog HDL:
    1. Levels of design hierarchy & gate primitives.
    2. Gate level modelling
    3. Switch level modelling
    4. Dataflow modelling
    5. Behavioral modelling
    6. Program structure description
  • Simulation of Verilog HDL logic designs on Modelsim.

 

# No. of mini projects – 6# No. of major projects – 1
L3
TIERL3
(3 weeks)
Fees:# Without takeaway kit: 7,450 Rs.**Fees is inclusive
of all taxes and
every participant
will get a DVD
which will contain
Softwares and
Tutorials.

Content of L1 + L2 +

  • Simulation of Verilog HDL logic designs on Modelsim.
  • Functional & formal verification of Verilog HDL designs.
  • ASIC design in Verilog HDL.
  • Implementing Digital Systems on XILIN FPGA board with Verilog HDL coding.
  • Testing techniques of Verilog HDL based designs.

 

# No. of mini projects – 9# No. of major projects – 1
L4
TIERL4
(4 weeks)
Fees:# Without takeaway kit: 8,950 Rs.**Fees is inclusive
of all taxes and
every participant
will get a DVD
which will contain
Softwares and
Tutorials.

Content of L1 + L2 + L3

  • Programming in VHDL:
    1. Basic concepts
    2. Levels of abstraction
    3. Building blocks of VHDL
    4. Program structure description
  • Introdution and working on MODELSIM Tool
  • Simulation of VHDL logic designs on Modelsim.
  • Functional & formal verification of VHDL designs.
  • ASIC design in VHDL.
  • Introduction to XILIN FPGA board.
  • Working on XILIN ISE tool.
  • Implementing Digital Systems on XILIN FPGA board with VHDL coding.

 

# No. of mini projects – 12# No. of major projects – 2
L5
TIERL5
(6 weeks)
Fees:# Without takeaway kit: 11,950 Rs.**Fees is inclusive
of all taxes and
every participant
will get a DVD
which will contain
Softwares and
Tutorials.

Content of L1 + L2 + L3 + L5 +

  • Processors architecture & modeling.
  • Digital Image Processing applications using VLSI.
  • Digital Signal Processing applications using VLSI.
  • System on chip modeling.
  • Advanced FPGA design.
  • Advanced testing and verification techniques.
  • Hybrid applications with VLSI and LABView.

 

# No. of mini projects – 15# No. of major projects – 2
L6
TIERL6
(8 weeks)
Fees:# Without takeaway
kit: 14,950 Rs.**Fees is inclusive
of all taxes and
every participant
will get a DVD
which will contain
Softwares and
Tutorials.

Content of L1 + L2 + L3 + L4 + L5 +

  • 3 Mini Projects
  • 2 Major Projects

 

# No. of mini projects – 18# No. of major projects – 4

Register for Summer ITP

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2 Responses

  1. mukesh says:

    Summer ITP – VLSI & Digital System Design
    is the best course ever..
    and micro incept technologies is the best solution for u to doing it….my experience was amazing..

  2. lalit says:

    Summer ITP – VLSI & Digital System Design….course is best…my experience was very good in micro incept…

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